=================================================================== RCS file: /home/cvs/OpenXM_contrib2/asir2000/gc/mach_dep.c,v retrieving revision 1.1.1.1 retrieving revision 1.4 diff -u -p -r1.1.1.1 -r1.4 --- OpenXM_contrib2/asir2000/gc/mach_dep.c 1999/12/03 07:39:09 1.1.1.1 +++ OpenXM_contrib2/asir2000/gc/mach_dep.c 2001/04/20 07:39:19 1.4 @@ -12,7 +12,7 @@ * modified is included with the above copyright notice. */ /* Boehm, November 17, 1995 12:13 pm PST */ -# include "gc_priv.h" +# include "private/gc_priv.h" # include # include # if defined(OS2) || defined(CX_UX) @@ -21,7 +21,7 @@ # endif # ifdef AMIGA # ifndef __GNUC__ -# include +# include # else # include # endif @@ -62,6 +62,12 @@ asm static void PushMacRegisters() #endif /* __MWERKS__ */ +# if defined(SPARC) || defined(IA64) + /* Value returned from register flushing routine; either sp (SPARC) */ + /* or ar.bsp (IA64) */ + word GC_save_regs_ret_val; +# endif + /* Routine to mark from registers that are preserved by the C compiler. */ /* This must be ported to every new architecture. There is a generic */ /* version at the end, that is likely, but not guaranteed to work */ @@ -74,6 +80,24 @@ void GC_push_regs() # ifdef RT register long TMP_SP; /* must be bound to r11 */ # endif + +# if defined(MIPS) && defined(LINUX) + /* I'm not sure whether this has actually been tested. */ +# define call_push(x) asm("move $4," x ";"); asm("jal GC_push_one") + call_push("$2"); + call_push("$3"); + call_push("$16"); + call_push("$17"); + call_push("$18"); + call_push("$19"); + call_push("$20"); + call_push("$21"); + call_push("$22"); + call_push("$23"); + call_push("$30"); +# undef call_push +# endif /* MIPS && LINUX */ + # ifdef VAX /* VAX - generic code below does not work under 4.2 */ /* r1 through r5 are caller save, and therefore */ @@ -154,7 +178,10 @@ void GC_push_regs() # else /* !__GNUC__ */ GC_push_one(getreg(REG_A2)); GC_push_one(getreg(REG_A3)); - GC_push_one(getreg(REG_A4)); +# ifndef __SASC + /* Can probably be changed to #if 0 -Kjetil M. (a4=globals)*/ + GC_push_one(getreg(REG_A4)); +# endif GC_push_one(getreg(REG_A5)); GC_push_one(getreg(REG_A6)); /* Skip stack pointer */ @@ -193,10 +220,14 @@ void GC_push_regs() # endif /* __MWERKS__ */ # endif /* MACOS */ -# if defined(I386) &&!defined(OS2) &&!defined(SVR4) &&!defined(MSWIN32) \ +# if defined(I386) &&!defined(OS2) &&!defined(SVR4) \ + && (defined(__MINGW32__) || !defined(MSWIN32)) \ && !defined(SCO) && !defined(SCO_ELF) \ - && !(defined(LINUX) && defined(__ELF__)) \ - && !(defined(__FreeBSD__) && defined(__ELF__)) \ + && !(defined(LINUX) && defined(__ELF__)) \ + && !(defined(FREEBSD) && defined(__ELF__)) \ + && !(defined(NETBSD) && defined(__ELF__)) \ + && !(defined(OPENBSD) && defined(__ELF__)) \ + && !(defined(BEOS) && defined(__ELF__)) \ && !defined(DOS4GW) /* I386 code, generic code does not appear to work */ /* It does appear to work under OS2, and asms dont */ @@ -211,20 +242,38 @@ void GC_push_regs() # endif # if ( defined(I386) && defined(LINUX) && defined(__ELF__) ) \ - || ( defined(I386) && defined(__FreeBSD__) && defined(__ELF__) ) + || ( defined(I386) && defined(FREEBSD) && defined(__ELF__) ) \ + || ( defined(I386) && defined(NETBSD) && defined(__ELF__) ) \ + || ( defined(I386) && defined(OPENBSD) && defined(__ELF__) ) /* This is modified for Linux with ELF (Note: _ELF_ only) */ /* This section handles FreeBSD with ELF. */ - asm("pushl %eax"); asm("call GC_push_one"); asm("addl $4,%esp"); - asm("pushl %ecx"); asm("call GC_push_one"); asm("addl $4,%esp"); - asm("pushl %edx"); asm("call GC_push_one"); asm("addl $4,%esp"); - asm("pushl %ebp"); asm("call GC_push_one"); asm("addl $4,%esp"); - asm("pushl %esi"); asm("call GC_push_one"); asm("addl $4,%esp"); - asm("pushl %edi"); asm("call GC_push_one"); asm("addl $4,%esp"); - asm("pushl %ebx"); asm("call GC_push_one"); asm("addl $4,%esp"); + /* Eax is caller-save and dead here. Other caller-save */ + /* registers could also be skipped. We assume there are no */ + /* pointers in MMX registers, etc. */ + /* We combine instructions in a single asm to prevent gcc from */ + /* inserting code in the middle. */ + asm("pushl %ecx; call GC_push_one; addl $4,%esp"); + asm("pushl %edx; call GC_push_one; addl $4,%esp"); + asm("pushl %ebp; call GC_push_one; addl $4,%esp"); + asm("pushl %esi; call GC_push_one; addl $4,%esp"); + asm("pushl %edi; call GC_push_one; addl $4,%esp"); + asm("pushl %ebx; call GC_push_one; addl $4,%esp"); # endif -# if defined(I386) && defined(MSWIN32) && !defined(USE_GENERIC) +# if ( defined(I386) && defined(BEOS) && defined(__ELF__) ) + /* As far as I can understand from */ + /* http://www.beunited.org/articles/jbq/nasm.shtml, */ + /* only ebp, esi, edi and ebx are not scratch. How MMX */ + /* etc. registers should be treated, I have no idea. */ + asm("pushl %ebp; call GC_push_one; addl $4,%esp"); + asm("pushl %esi; call GC_push_one; addl $4,%esp"); + asm("pushl %edi; call GC_push_one; addl $4,%esp"); + asm("pushl %ebx; call GC_push_one; addl $4,%esp"); +# endif + +# if defined(I386) && defined(MSWIN32) && !defined(__MINGW32__) \ + && !defined(USE_GENERIC) /* I386 code, Microsoft variant */ __asm push eax __asm call GC_push_one @@ -268,12 +317,11 @@ void GC_push_regs() asm ("movd r7, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4"); # endif -# ifdef SPARC +# if defined(SPARC) { word GC_save_regs_in_stack(); - /* generic code will not work */ - (void)GC_save_regs_in_stack(); + GC_save_regs_ret_val = GC_save_regs_in_stack(); } # endif @@ -333,12 +381,22 @@ void GC_push_regs() # endif /* !__GNUC__ */ # endif /* M68K/SYSV */ +# if defined(PJ) + { + register int * sp asm ("optop"); + extern int *__libc_stack_end; + GC_push_all_stack (sp, __libc_stack_end); + } +# endif + /* other machines... */ # if !(defined M68K) && !(defined VAX) && !(defined RT) # if !(defined SPARC) && !(defined I386) && !(defined NS32K) -# if !defined(POWERPC) && !defined(UTS4) +# if !defined(POWERPC) && !defined(UTS4) +# if !defined(PJ) && !(defined(MIPS) && defined(LINUX)) --> bad news <-- +# endif # endif # endif # endif @@ -363,11 +421,25 @@ ptr_t cold_gc_frame; for (; (char *)i < lim; i++) { *i = 0; } -# if defined(POWERPC) || defined(MSWIN32) || defined(UTS4) +# if defined(POWERPC) || defined(MSWIN32) || defined(MSWINCE) \ + || defined(UTS4) || defined(LINUX) (void) setjmp(regs); # else (void) _setjmp(regs); # endif +# if defined(SPARC) || defined(IA64) + /* On a register window machine, we need to save register */ + /* contents on the stack for this to work. The setjmp */ + /* is probably not needed on SPARC, since pointers are */ + /* only stored in windowed or scratch registers. It is */ + /* needed on IA64, since some non-windowed registers are */ + /* preserved. */ + { + word GC_save_regs_in_stack(); + + GC_save_regs_ret_val = GC_save_regs_in_stack(); + } +# endif GC_push_current_stack(cold_gc_frame); } } @@ -385,10 +457,16 @@ ptr_t cold_gc_frame; asm(" .globl _GC_save_regs_in_stack"); asm("_GC_save_regs_in_stack:"); # endif - asm(" ta 0x3 ! ST_FLUSH_WINDOWS"); - asm(" mov %sp,%o0"); - asm(" retl"); - asm(" nop"); +# if defined(__arch64__) || defined(__sparcv9) + asm(" save %sp,-128,%sp"); + asm(" flushw"); + asm(" ret"); + asm(" restore %sp,2047+128,%o0"); +# else + asm(" ta 0x3 ! ST_FLUSH_WINDOWS"); + asm(" retl"); + asm(" mov %sp,%o0"); +# endif # ifdef SVR4 asm(" .GC_save_regs_in_stack_end:"); asm(" .size GC_save_regs_in_stack,.GC_save_regs_in_stack_end-GC_save_regs_in_stack"); @@ -398,6 +476,36 @@ ptr_t cold_gc_frame; # endif # endif +/* On IA64, we also need to flush register windows. But they end */ +/* up on the other side of the stack segment. */ +/* Returns the backing store pointer for the register stack. */ +# ifdef IA64 +# ifdef __GNUC__ + asm(" .text"); + asm(" .psr abi64"); + asm(" .psr lsb"); + asm(" .lsb"); + asm(""); + asm(" .text"); + asm(" .align 16"); + asm(" .global GC_save_regs_in_stack"); + asm(" .proc GC_save_regs_in_stack"); + asm("GC_save_regs_in_stack:"); + asm(" .body"); + asm(" flushrs"); + asm(" ;;"); + asm(" mov r8=ar.bsp"); + asm(" br.ret.sptk.few rp"); + asm(" .endp GC_save_regs_in_stack"); +# else + void GC_save_regs_in_stack() { + asm(" flushrs"); + asm(" ;;"); + asm(" mov r8=ar.bsp"); + asm(" br.ret.sptk.few rp"); + } +# endif +# endif /* GC_clear_stack_inner(arg, limit) clears stack area up to limit and */ /* returns arg. Stack clearing is crucial on SPARC, so we supply */ @@ -415,6 +523,21 @@ ptr_t cold_gc_frame; asm("GC_clear_stack_inner:"); asm(".type GC_save_regs_in_stack,#function"); # endif +#if defined(__arch64__) || defined(__sparcv9) + asm("mov %sp,%o2"); /* Save sp */ + asm("add %sp,2047-8,%o3"); /* p = sp+bias-8 */ + asm("add %o1,-2047-192,%sp"); /* Move sp out of the way, */ + /* so that traps still work. */ + /* Includes some extra words */ + /* so we can be sloppy below. */ + asm("loop:"); + asm("stx %g0,[%o3]"); /* *(long *)p = 0 */ + asm("cmp %o3,%o1"); + asm("bgu,pt %xcc, loop"); /* if (p > limit) goto loop */ + asm("add %o3,-8,%o3"); /* p -= 8 (delay slot) */ + asm("retl"); + asm("mov %o2,%sp"); /* Restore sp., delay slot */ +#else asm("mov %sp,%o2"); /* Save sp */ asm("add %sp,-8,%o3"); /* p = sp-8 */ asm("clr %g1"); /* [g0,g1] = 0 */ @@ -429,6 +552,7 @@ ptr_t cold_gc_frame; asm("add %o3,-8,%o3"); /* p -= 8 (delay slot) */ asm("retl"); asm("mov %o2,%sp"); /* Restore sp., delay slot */ +#endif /* old SPARC */ /* First argument = %o0 = return value */ # ifdef SVR4 asm(" .GC_clear_stack_inner_end:");